The ProASIC 500K family's nonvolatile Flash technology combines the advantages of ASICs with the benefits of programmable devices. ProASIC 500K devices shorten time-to-production by enabling designers to create high-density systems using existing ASIC or FPGA design flows and tools. ASIC migration is not necessary for any volume because the family offers cost effective reprogrammable solutions, ideal for applications in the networking, telecom, computer, and consumer markets. The ProASIC 500K family consists of four devices ranging from 100k to 475k system gates and with up to 63k bits of embedded two-port memory. These memory blocks include hardwired FIFO circuitry as well as circuits to generate or check parity. This minimizes external logic gate count and complexity while maximizing flexibility and utility.
| Parameter |
Condition |
Minimum |
Maximum |
Units |
| Supply Voltage Core (VDDL) |
|
0.3 |
3.0 |
V |
| Supply Voltage I/O Ring (VDDP) |
|
0.3 |
4.0 |
V |
| DC Input Voltage |
|
0.3 |
VDDP + 0.3 |
V |
| PCI DC Input Voltage |
|
0.5 |
VDDP + 0.5 |
V |
| DC Input Clamp Current |
VIN < 0 or VIN> VDDP |
10 |
+10 |
mA |
Note: Stresses beyond those listed in the Absolute Maximum Ratings table can cause permanent damage to the device. Exposure to maximum rated conditions for extended periods can adversely affect device reliability. Operation of the device at these conditions or any others beyond those listed in the Recommended Operating Conditions is not implied.
Required Field 
